這篇《2014年（上海）威盛電子硬件部門校園招聘簡章》是為大家整理的，希望對大家有所幫助。以下信息僅供參考！??！
1987年，威盛在美國加州佛里蒙特市成立。經(jīng)過20余年發(fā)展，已經(jīng)成為全球IC設計與個人電腦平臺解決方案領導廠商，也是全球同時提供 x86、ARM 及3G 平臺支持的華人企業(yè)。主要專注于x86、ARM、3G CDMA、3D 圖形, 以及高速外設等解決方案的研發(fā)設計，得到全球眾多知名廠商認可，與惠普、戴爾、聯(lián)想、三星、清華同方、中國電信、Sprint、Reliance等成為合作伙伴。
威盛的創(chuàng)立者、一手打造臺灣兩代股王企業(yè)的臺灣"科技第一女創(chuàng)業(yè)家"王雪紅女士，在2000年將這顆炙熱的"中國芯"在中國大陸落地生根，并相繼在北京、上海、深圳、杭州發(fā)芽生長。威盛電子(中國)有限公司便是威盛在"中國芯"戰(zhàn)略布局下于2000年2月首先在北京成立的大陸地區(qū)首家企業(yè)，同時也是威盛電子的中國區(qū)運營總部。
威盛在中國大陸地區(qū)目前已有員工超過1500人，其中80% 以上為碩士研究生，是一個年輕、充滿活力的大家庭。威盛以"正直"、"積極向上"、"創(chuàng)新"、"紀律"和"客戶信賴"的核心價值觀為準則，尊重和重視人才?；趥€人成長與公司需求，公司為每一位員工規(guī)劃了一系列的培訓課程與拓展訓練，協(xié)助員工快速成長。
硬件部門
Job Description for SH HW Department
招聘部門：硬件部
工作地點：上海
職位描述和要求：
1、ASIC Design Engineer
【Responsibilities】
-Develop advanced Computer Graphics Processor.
-Perform RTL design, IP verification ( include digital simulation, emulation ,
FPAG prototype),
timing analysis, formal verification.
-SOC architecture and SOC integrate
-DC/PT flow
-DFT test
-verification methodology , OVM/VMM testbench build up.
【Requirements】
- MS or equivalent. Familiar with principle of Logic Design. Knowledgeable about Computer
Architecture
-Familiar with IC Design flow:
1) well versed in RTL coding, in either Verilog or VHDL, system verilog .
2) familiar with perl , tcl, csh and so on .
3) Familiar with tools for Synthesis, Timing Analysis, and Formal Verification, such as Design
Compiler, Primetime, and Formality. -Good communication skills.
-Must be a team player.
-Good reading/writing skills in English.
2、IC Physical Design Engineer
【Responsibilities】
-- responsible for whole chip hierarchical floorplan, module level physical synthesis, APR, CTS.
-- timing closure, IR drop analysis, physical verification till tapeout.
-- implement multi-ten-million gate count 28nm GPU relative IC physical design.
【Requirements】
-- MS or equivalent. Major in microelectronics or relative department.
-- Have the experience of using ICC or EDI such that EDA tools, familiar with IC physical design flow.
-- Familiar with perl/TCL Script programming as a plus.
-- Good communication and positive attitude, good at team work.
3、System Engineer
【Responsibilities】
- In charge of the system level validation of high-end ARM based SoCASIC.
- Provide the total solution for SoC based products including defining user model for customers,
providing reference design, solving the software or hardware issues in customer designing and
providing field assistance on mass production.
- In charge of the designing and debugging of large scale FPGA platform for SoC silicon validation.
- Research and development of other tools and products based on FPGA or SoC.
【Requirements】
- Candidates should be this year’s Master in EE, Microelectronics, Telecommuni cation, Computer science, Automation or related subject.
- Be familiar with x86 PC or ARM architecture, or MCU, or FPGA development.
- Can understand schematic without difficult. - Have good English reading ability to understand English datasheet well.
- Proficient in using multi-meter, oscilloscope or other measurement devices.
- Have experience in hardware project development.
- Good team work spirit.
【Skills as a Plus】
- Proficient in schematic design using ORCAD.
- Proficient in PCB design using Allegro.
- Proficient in C/C /C# programming.
- Proficient in Verilog/VHDL programming.
- Proficient in Linux OS.
- Having good soldering skill.
- Familiar with circuit simulation.
- Familiar with I2C/SPI/UART/PCIE/SATA/USB bus.
- Familiar with DVI/HDMI/CRT/MHL interfaces.
- Have experience in the debug and design of High-Speed PCB.
內(nèi)推簡歷篩選通過者將直接參加面試，面試優(yōu)異者有機會提前獲得offer
簡歷文件名格式 學校-高學歷-姓名-投遞職位
簡歷投遞至 angelneitui@163.com
截止日期 9月8日
1987年，威盛在美國加州佛里蒙特市成立。經(jīng)過20余年發(fā)展，已經(jīng)成為全球IC設計與個人電腦平臺解決方案領導廠商，也是全球同時提供 x86、ARM 及3G 平臺支持的華人企業(yè)。主要專注于x86、ARM、3G CDMA、3D 圖形, 以及高速外設等解決方案的研發(fā)設計，得到全球眾多知名廠商認可，與惠普、戴爾、聯(lián)想、三星、清華同方、中國電信、Sprint、Reliance等成為合作伙伴。
威盛的創(chuàng)立者、一手打造臺灣兩代股王企業(yè)的臺灣"科技第一女創(chuàng)業(yè)家"王雪紅女士，在2000年將這顆炙熱的"中國芯"在中國大陸落地生根，并相繼在北京、上海、深圳、杭州發(fā)芽生長。威盛電子(中國)有限公司便是威盛在"中國芯"戰(zhàn)略布局下于2000年2月首先在北京成立的大陸地區(qū)首家企業(yè)，同時也是威盛電子的中國區(qū)運營總部。
威盛在中國大陸地區(qū)目前已有員工超過1500人，其中80% 以上為碩士研究生，是一個年輕、充滿活力的大家庭。威盛以"正直"、"積極向上"、"創(chuàng)新"、"紀律"和"客戶信賴"的核心價值觀為準則，尊重和重視人才?；趥€人成長與公司需求，公司為每一位員工規(guī)劃了一系列的培訓課程與拓展訓練，協(xié)助員工快速成長。
硬件部門
Job Description for SH HW Department
招聘部門：硬件部
工作地點：上海
職位描述和要求：
1、ASIC Design Engineer
【Responsibilities】
-Develop advanced Computer Graphics Processor.
-Perform RTL design, IP verification ( include digital simulation, emulation ,
FPAG prototype),
timing analysis, formal verification.
-SOC architecture and SOC integrate
-DC/PT flow
-DFT test
-verification methodology , OVM/VMM testbench build up.
【Requirements】
- MS or equivalent. Familiar with principle of Logic Design. Knowledgeable about Computer
Architecture
-Familiar with IC Design flow:
1) well versed in RTL coding, in either Verilog or VHDL, system verilog .
2) familiar with perl , tcl, csh and so on .
3) Familiar with tools for Synthesis, Timing Analysis, and Formal Verification, such as Design
Compiler, Primetime, and Formality. -Good communication skills.
-Must be a team player.
-Good reading/writing skills in English.
2、IC Physical Design Engineer
【Responsibilities】
-- responsible for whole chip hierarchical floorplan, module level physical synthesis, APR, CTS.
-- timing closure, IR drop analysis, physical verification till tapeout.
-- implement multi-ten-million gate count 28nm GPU relative IC physical design.
【Requirements】
-- MS or equivalent. Major in microelectronics or relative department.
-- Have the experience of using ICC or EDI such that EDA tools, familiar with IC physical design flow.
-- Familiar with perl/TCL Script programming as a plus.
-- Good communication and positive attitude, good at team work.
3、System Engineer
【Responsibilities】
- In charge of the system level validation of high-end ARM based SoCASIC.
- Provide the total solution for SoC based products including defining user model for customers,
providing reference design, solving the software or hardware issues in customer designing and
providing field assistance on mass production.
- In charge of the designing and debugging of large scale FPGA platform for SoC silicon validation.
- Research and development of other tools and products based on FPGA or SoC.
【Requirements】
- Candidates should be this year’s Master in EE, Microelectronics, Telecommuni cation, Computer science, Automation or related subject.
- Be familiar with x86 PC or ARM architecture, or MCU, or FPGA development.
- Can understand schematic without difficult. - Have good English reading ability to understand English datasheet well.
- Proficient in using multi-meter, oscilloscope or other measurement devices.
- Have experience in hardware project development.
- Good team work spirit.
【Skills as a Plus】
- Proficient in schematic design using ORCAD.
- Proficient in PCB design using Allegro.
- Proficient in C/C /C# programming.
- Proficient in Verilog/VHDL programming.
- Proficient in Linux OS.
- Having good soldering skill.
- Familiar with circuit simulation.
- Familiar with I2C/SPI/UART/PCIE/SATA/USB bus.
- Familiar with DVI/HDMI/CRT/MHL interfaces.
- Have experience in the debug and design of High-Speed PCB.
內(nèi)推簡歷篩選通過者將直接參加面試，面試優(yōu)異者有機會提前獲得offer
簡歷文件名格式 學校-高學歷-姓名-投遞職位
簡歷投遞至 angelneitui@163.com
截止日期 9月8日